A Scalable Video Rate Camera Interface.pdf

1 Computer Science Department 3 Electrical and Computer Engineering Department 2 Robotics Intsitute School of Computer Science Carnegie Mellon University Pittsburgh, Pennsylvania 15213-3890 Abstract We survey the state of the art in high-speed interfaces for video input to high performance computers and note the difficulty of providing video at rates appropriate to modern parallel computers. Most interfaces that have been developed to date are not scal- able, required extensive hardware development, and impose a full frame time delay between the moment the camera captures video and the moment it is available for processing. We propose a solution, based on a simple interface we have developed, which has been integrated into the iWarp parallel computer developed by Carnegie Mellon University and Intel Corporation. The inter- face takes advantage of iWarp’s systolic capabilities, does not impose any frame buffer delay time, was simple to design, and is readily scalable to provide up to 32 camera ports, from all of which data can be captured at full video rate, on a system that fits in a 19 6U rack. We have applied the system to multibaseline stereo vision, and provide performance figures. A Scalable Video Rate Camera Interface Jon A. Webb 1,2 , Thomas Warfel 3 , and Sing Bing Kang 2 26 September 1994 CMU-CS-94-192 This research was partially supported by the Adanced Research Projects Agency of the Department of Defense under contract number F19628-93- C-0171, ARPA order number A655, “High Performance Computing Graphics,” monitored by Hanscom Air Force Base. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the Advanced Research Projects Agency, the Department of Defense, or the U.S. government. This document was created with FrameMaker 4.0.2 ACM Computing Reviews Keywords: C.1.2 Multiple-instruction-stre