The Impact of VLSI Fabrication on Neural Learning.pdf

The Impact of VLSI Fabrication on Neural Learning † † H. C. Card, D. K. McNeill, C. R. Schneider , and R. S. Schneider Department of Electrical and Computer Engineering University of Manitoba Winnipeg, Manitoba, Canada R3T 5V6 hcard@ee.umanitoba.ca Abstract—The fabrication of silicon versions of below the levels tolerated by the learning algorithms. artificial neural learning algorithms in existing VLSI This variation includes normal levels of intrachip (and in processes introduces a variety of concerns which do most cases also interchip) statistical variation in the not exist in a theoretical system. These include such parameters, most of which is compensated for by the well known circuit properties as noise, variations and learning processes. In the particular case of offset errors nonlinearity of fabricated devices, arithmetic in the arithmetic, certain circuit modifications are inaccuracy, and capacitive decay. The supervised required but are easily introduced at little expense in learning algorithm—contrastive Hebbian learning, silicon area. The simulations correspond to networks of and unsupervised soft competitive learning have limited size since they are performed on serial demonstrated their resiliency in the presence of these workstations and, while somew