《Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC》.pdf

1392 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 55, NO. 5, JUNE 2008 Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC Tsz Yin Man, Student Member, IEEE, Ka Nang Leung, Senior Member, IEEE, Chi Yat Leung, Philip K. T. Mok, Senior Member, IEEE, and Mansun Chan, Senior Member, IEEE Abstract— The design issues of a single-transistor-control (STC) cellation scheme in [5], a load-dependent reference voltage low-drop-out (LDO) based on flipped voltage follower is discussed concept in [6], pole-splitting schemes in [7]–[10], were pro- in this paper, in particular the feedback stability at different condi- posed. Recently, a super source follower [11], in form of FVF tions of output capacitors, equivalent series resistances (ESRs) and load current. Based on the analysis, an STC LDO was implemented [1]–[3], has been applied to the designs of a buffer [12] and a in a standard 0.35- m CMOS technology. It is proven experimen- power stage [13] in LDO. The main advantage of the FVF is tally that the LDO provides stable voltage regulation at a variety the reduced output impedance due to shunt feedback connec- of output-capacitor/ESR conditions and is also stable in no output tion [11], which is the key for obtaining good regulation and capacitor condition. The preset output voltage, minimum unregu- achieving frequency compensation. However, there are, in fact, lated input voltage, maximum output current at a dropout voltage of 200 mV, ground current and active chip area are 1 V, 1.2 V, 50 many design issues have to be studied when using the FVF mA, 95 A, and  m  m, respectively. The full-load