一种低功耗24GHz低噪声放大器设计-电子器件.PDF

第34 卷 第5期 电 子 器 件 Vol.34摇 No.5 2011年10 月 ChineseJournal of Electron Devices Oct. 2011 Design of a Low Power2.4 GHz LNA* * WENG Yinfei,SUN Lingling ,GAOHaijun,LinLongqian (Key Lab of RF Circuit and System,Ministry of Education,HangzhouDianzi University,Hangzhou310018,China) Abstract:A2.4 GHz CMOS low noise,low consumed power amplifier was designed,and the theories of the noise matching was presented.Thisamplifierwascomprised of the classical cascade structure andthe capacitor C added ex between the gate and the input source of MOSFET in order to meet the conjugated matching and noise matching simultaneously.The circuit is implemented with the SMIC65nm CMOS technology and simulated by Cadence.The results show that the consumed power is less than7 mW under the 1.2 V supply,noise figure is less than0.7 dB and the gain is larger than21dB.It is unconditionally stable.The whole layout occupies0.57 mm伊0.65 mm. Key words:CMOS;LNA;noise matching;low power EEACC:1220摇 摇 摇 摇 doi:10.3969/j.issn.1005-9490.2011.05.009 一种低功耗2.4 GHz低噪声放大器设计* * 翁寅飞,孙玲玲 ,高海军,林隆乾 (杭州电子科技大学射频电路与系统教育部重点实验室,杭州310018) 摘摇 要:设计了一个低功耗2.4 GHz低噪声放大器,并详细阐述了电路的噪声匹配理论。 该低噪声放大器采用经典的共源 共栅结构,为了同时满足共轭匹配与噪声匹配,在输入管的栅源间增加了一个电容 C 。 电路设计采用SMIC65 nm CMOS工 ex 艺,并用Cadence进行仿真。 仿真结果表明:电路在1.2 V 电源电压下的功耗小于7 mW,噪声系数小于0.7 dB,增益大于21 dB。 电路在所需频率范围内满足绝对稳定条件,芯片版图面积为0.57 mm伊0.65 mm。 关键词:CMOS;低噪声放大器;噪声匹配;低功耗; 中图分类号:TN4摇 摇 摇 摇 文献标识码:A摇 摇 摇 摇 文章编号:1005-9490(2011)05-0517-04 摇 摇 在无线通信中,低噪声放大器(LNA)是射频接收 入共轭匹配,使输入阻抗为50 赘。 图2是其小信号 机最为关键的部分之一,它性能的好坏直接决定了整