简易数字抢答器的设计报告.doc

数字电子技术 课程设计报告 题 目：简易数字抢答器的设计 专 业：____电子信息工程_ 年 级：____2012级_______ 学 号：____1210612046___ 学生姓名：____韦灵瑾________ 联系电话：_____ 指导老师：_____谢祥徐_______  完成日期：2014年11月22日 简易数字抢答器的设计 摘 要 电路选用优先编码器?74LS148?、锁存器?74LS373?、74LS47译码和一个7 段数码管组成抢答显示电路；定时显示主要由555定时器秒脉冲产生电路、十进制同步加减计数器74LS192减法计数电路、和7段数码管及相关电路组成；由555定时器和三极管构成的报警电路。接通电源后，主持人将开关拨到清零状态，抢答器处于禁止状态，编号显示器灭灯，定时器显示设定时间；主持人将开关置;开始状态，宣布开始抢答器工作。选手在定时时间内抢答时，抢答器完成：优先判断、编号锁存、编号显示、扬声器提示。当一轮抢答之后，定时器停止、禁止二次抢答、定时器显示剩余时间。如果再次抢答必须由主持人再次操作清除和开始状态开关。本文介绍了系统的总体设计和各个功能模块以及系统原理，重点阐述了实现过程中的数据传输和报警信息发送、接收和处理。? 关键词:优先抢答；计时；芯片；逻辑功能? ABSTRACT 74 ls148 circuit selects the priority encoder, latch 74 ls373, 74 ls47 decoding and a 7 Period of digital tubes vies to answer first display circuit; Time display is mainly composed of 555 timer second pulse generating circuit, decimal synchronization and subtract 74 ls192 counter subtraction counting circuit, and seven segment digital tube and related circuit; Composed of 555 timer and triode alarm circuit. After turning on the power supply, the host will switch to the \reset\ state, the buzzer in forbidden state, number display out the lamp, the timer display setting time; Presenters will switch; Start \state, announced the\ start \buzzer. Players in the timing time vies to answer first, vies to answer first device: priority judgment, number of latches, number display, speakers tip. After the round vies to answer first, timer stop, secondary vies to answer first, timer display the remaining time is forbidden. If again vies to answer first needs to be signed by the host operating again\ clear \and\ start \state switch. This paper introduces the overall design of the system and each function module and system principle, expounds the realization process of data transmission and alarm sending, receiving and processing information. Key words: first vies to answer first; Timing; Chips; Logic function 目　录 摘 要 II ABSTRACT III 1 设计要求及方案选择 5 1.1设计要求 5 1.2总电路框图 5 1.