模拟电路设计工程师.doc

模拟电路设计工程师 Analog Circuit Design Engineer 工作描述： 设计开发CMOS 深亚微米模拟电路 指导、监督版图设计 协助设计测试板, 调试验证测试芯片 职位要求： 电子工程专业硕士/博士学历 相关课程知识及项目经验 有以下单项或多项设计经验：低电压、低噪音OPA；LDO/DCDC, ADCDAC；PLLDLL； 高速SerDes；RF和其他模拟电路 富有事业心和团队合作精神，沟通表达能力良好 工作地点： 上海/成都 Responsibilities: Devise and develop deep sub-micron CMOS analog circuit Guide and/or supervise layout Assist in the design of test boards so as to debug and verify test chips Requirements: MS/PHD degree, majored in EE Course knowledge and project experience in the related areas Have experience on one or some of the following disciplines: low voltage/low noise OPA, LDO/DCDC, ADCDAC, PLL/DLL, high speed SerDes, RF and other analog blocks Self motivated, good communication and team work skills are a must Location: Shanghai/Chengdu 版图设计工程师 Layout Design Engineer 工作描述： 根据指导设计、开发模拟/混合信号/IO/标准单元/存储器CMOS深亚微米芯片版图 验证/分析，处理版图设计的DRC/LVS/ERC/ANT 根据公司设计流程参与产生流片数据包 职业要求： 电子工程、计算机科学或物理学等相关专业本科或更高学历，有一定工作经验或可靠培训机构（如ICC）的版图培训证书 懂得以下单项或多项版图设计原理：模拟电路， 混合信号，标准单元，IO PAD，存贮器 懂得集成电路设计的整个开发流程 熟悉Virtuoso/Laker/IC_station, Calibre/Hercules/Assura和Star_RC 工具及使用环境 熟悉UNIX/LINUX操作系统 富有事业心和团队合作精神，沟通表达能力良好，中英文流利 精通电路和亚微米工艺者优先 工作地点： 上海/成都 Responsibilities: Theoretical application knowledge in the field of schematic, IC process, physical drawing, and tools Layout design/develop of Analog/Mixed signal/IO/STD/Memory circuit of deep sub-micro CMOS under the guidance of supervisor Verify/debug DRC/LVS/ERC/ANT of designs Assist in tapeout kit generation following internal established flows Requirements: Bachelor’s degree or above, majored in EE, CS, Physics, etc, with related work experience or layout training certification from certified training center (such as ICC) Knowledge in at least one of the following disciplines: Analog, Mixed_Signal, STD, IO, Memory layout and verification Understand the entire development flow of IC design Familiar with Virtuoso/Laker/IC_station, Calibre/Hercules/Assura, Star_RC tools and the environments Familiar with UNIX/LINUX operation systems Sel