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BIOS 03 HWIDSPBIOS研讨会硬件中断IDLE线程设计.ppt

发布:2017-04-24约1.89千字共44页下载文档
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DSP/BIOS System Integration Workshop;Learning Objectives;Hardware Interrupts;Foreground / Background Scheduling;Foreground / Background;Interrupt Enable Management Concepts;Interrupt Management - Additional Info;Hardware Interrupts;Idle;;;;Creating a new Idl Obj 1. right click on IDL mgr 2. select “insert IDL” 3. right click on new IDL 4. select “rename” 5. type new name 6. right click on new IDL 7. select “properties”;Hardware Interrupts;;HWI_c (p4);;;Hardware Interrupts;Adding Preemption to HWIs;HWI_c (p4);Enabling Preemption via the Dispatcher;Assembly Code Dispatch Option;Comparison of Interrupt Options ;HWI API Summary;Hardware Interrupts;HWI Monitor Option;Setup of HWI Monitor Option 1/2;Setup of HWI Monitor Option 2/2;HWI Object;Hardware Interrupts;FIR Filter Overview;;;;void isrAudio(void) { static short i; // loop index static int dataIn, dataOut; // interface to MCBSP read/write static short dataOutL, dataOutR; // FIR results of L R channels dataIn = MCBSP1_DRR_32BIT; // Get one stereo sample (L R Data) buf[0] = (short)dataIn; // Place Left data sample in delay line buf[1] = (short)(dataIn 16); // Put Right data sample in delay line for (i = FIRSZ-2; i = 0; i--) // for 2*(#coeffs-1) buf[i+2] = buf[i]; // move all data down 1 pair if( sw0 == 1 ) { // If filtering is on... fir(buf[0], coeffs[sw1][0], dataOutL, FIRSZ, 1); // left channel FIR fir(buf[1], coeffs[sw1][0], dataOutR, FIRSZ, 1); // right channel FIR dataOut = 0x0000FFFF dataOutL; // get left value for output dataOut |= 0xFFFF0000 (dataOutR 16); // or in right chan in MSBs } else // if filtering is off... dataOut = dataIn; // new input copied to output MCBSP1_DXR_32BIT = dataOut; // Send data to codec, (single channel) };included headers;Working with TCF Files;Hardware Interrupts;Lab Details;ti;C62/C64 API;HWI API;ECM API
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