【2017年整理】东莞理工学院 arm期末参考资料——程序题.doc
文本预览下载声明
东莞理工学院 arm期末参考资料——程序题
编写设置系统时钟的程序。Fin=12MHZ,要求fclk:hclk:pclk=200:100:50M HZ
MPLLCON:设为(0x5c 12)|(0x04 4)|(0x00),即0x5c0040
对于MPLLCON寄存器,[19:12]为MDIV,[9:4]为PDIV,[1:0]为SDIV。有如下计算公式:MPLL(FCLK) = (m * Fin)/(p * 2^s)
其中: m = MDIV + 8, p = PDIV + 2
Fin 即默认输入的时钟频率12MHz。MPLLCON设为0x5c0040,可以计算出FCLK=200MHz,再由CLKDIVN的设置可知:HCLK=100MHz,PCLK=50MHz。#define rLOCKTIME (*(volatile unsigned *)0x4c000000) //PLL lock time
#define rMPLLCON (*(volatile unsigned *)0x4c000004) //MPLL Control
#define rCLKCON (*(volatile unsigned *)0x4c00000c) //Clock
#define rCLKDIVN (*(volatile unsigned *)0x4c000014) //Clock divider
#define rUPLLCON (*(volatile unsigned *)0x4c000008) //UPLL Control
#define rCLKSLOW (*(volatile unsigned *)0x4c000010) //Slow clock
void clock_init(void){
rLOCKTIME = 0xFFFFFF; 设定锁定时间
rCLKDIVN = 0x3; 设定分频比例fclk:hclk:pclk=1:2:4
rMPLLCON = 0x5c0040; }
用汇编程序:
rLOCKTIME equ 0x4c000000 rMPLLCON equ 0x4c000004
rCLKCON equ 0x4c00000c
ldr r0 , = rLOCKTIME mov r1 ,# 0xFFFFFF str r1 ,[r0]
ldr r0 , = rMPLLCON mov r1 ,# 0x03 str r1 ,[r0]
ldr r0 , = rCLKCON mov r1 ,# 0x5c0040 str r1 ,[r0]
利用计时器,Fin=12MHZ,fclk:hclk:pclk=200:100:50,编写定时2秒的程序。
#define rTCFG0 (*(volatile unsigned *)0 //Timer 0 configuration
#define rTCFG1 (*(volatile unsigned *)0 //Timer 1 configuration
#define rTCON (*(volatile unsigned *)0 //Timer control
#define rTCNTB0 (*(volatile unsigned *)0x5100000c) //Timer count buffer 0
* Timer input clock Frequency = PCLK / {prescaler value+1} / {divider value}
* {prescaler value} = 0~255
* {divider value} = 2, 4, 8, 16
* Timer0的时钟频率=100MHz/(99+1)/(16)=62500Hz
void timer0_init(void){
TCFG0 = 99; // 预分频器0 = 99
TCFG1 = 0x03; // 选择16分频
TCNTB0 = 250000; // 2秒钟 rTCON |= (11); // 手动更新
TCON = 0x09; // 自动加载,清“手动更新”位,启动定时器0}
汇编程序:
rTCFG0 equ 0 rTCFG1 equ 0rTCNTB0 equ 0x5100000c rTCON equ 0ldr r0 , = rTC
显示全部