重叠流水和现代处理器技术.PDF

20065 l ∆t1 ∆t2 ∆t3 ∆t4 I: add r1,r2,r3 J: sub r4,r1,r5 : (Hazard) : (Hazard) : (Hazard) : (Hazard) Instr 1 • • Instr 2 • () Cycle 1 Cycle 2 Cycle 3 Cycle 4 Cycle 5 Cycle 6 Cycle 7 U Ifetch Reg L DMem Reg DMem Load A U Ifetch Reg L DMem Reg Instr 1 A U Ifetch Reg L DMem