宽带OFDM传输接收机系统EDA设计_时间同步实验设计.ppt

* 通信抗干扰技术国家级重点实验室 宽带OFDM传输接收机系统EDA设计 ——时间同步实验设计 电子科技大学通信抗干扰技术国家级重点实验室 Outlines 1 2 3 4 时间同步的概念 主要知识点 同步算法和设计方式 考核方式 Find out start location of each FFT frame Part1 时间同步的概念 Preamble based timing synchronization algorithm In practice Cosimulation of Simulink and Modelsim PLL core in Quartus Rom core in Quartus Slide correlation State-machine design method Some tips Part2 主要知识点 Physical frame structure Part3 同步算法和设计方法 Time synchronization algorithm Part3 同步算法和设计方法 PN Sequence PN128 = PN256 by interpolation Local PN256 Interpolated PN256 Repeated PN256 Part3 同步算法和设计方法 Local PN256 Sequences constant pn_rpt : std_logic_vector(0 to 255) := 1100001100000011111100000000110011111111110000110011001111110000111100110000001100001111111100000011001100000000111100000000001100000000000011111111111111001100110011000011110000111111001111110011000011001111000000111100111111110011110011001111001111000000; constant pn_itp : std_logic_vector(0 to 255) := 1100011000000111111100000001110011111111110001100110001111110000111001110000001100011111111000000111001100000001111100000000001100000000000111111111111110011000110011000111110001111110001111100011000110001110000000111000111111100011100111001110001110000000; Part3 同步算法和设计方法 Correlation computation Implementation complexity Need multiplier? Number of signal bits Number of computation delay (About pipeline design and speed) Part3 同步算法和设计方法 Modular design method Part3 同步算法和设计方法 System clock Part3 同步算法和设计方法 Correlator Part3 同步算法和设计方法 Simulink Module Part3 同步算法和设计方法 信号量化 Part3 同步算法和设计方法 process(rst, clk) begin if (rst = 1) then sign_out_I = (others=0); sign_out_Q = (others=0); elsif (clkevent and clk=1) then if (en = 1 and din_dv = 1) then if (din_I_msb=0) then sign_out_I = 01; -- +1 else sign_out_I = 11; -- -1 end if; if (din_I_msb=0) then