基于FPGA的汉明码译码器的设计毕业设计论文.doc_精品.doc

大连交通大学信息工程学院 毕 业 设 计 (论 文) 题 目 基于FPGA地汉明码译码器地设计 学生姓名 芦 斌 专业班级 信息工程09-2 指导教师 徐 佳　 职 称　 讲 师 所在单位 电气工程系信息工程教研室 教研室主任 　 石桂名 完成日期 2013年 6 月 28 日 摘要FPGA Verilog语言 QuartusII ABSTRACT In digital communication systems, digital signal during transmission is easy to be disturbed, resulting in destruction of the symbol waveform, so that the receiver receives the signal error occurred judgment. In order to?improve the accuracy of information, we introduce error control?techniques. The?technology uses?a?reliable and effective method?of channel coding?to?achieve. Hamming code is a kind of code which is able to correct errors. Hamming code codes is one kind of the most commonly used devices in digital communications, which is widely used in network transmission, memory parity error correction and data security. ?The design of Hamming code codec in this project, this passage realized decode of hamming with language of verilog. Based on the theory of introduction of decode of hamming, this passage designed decoder of hamming. The source program wad written by verilog language. The soft of QuartusII simulated and tested the program. It requires basic theoretical knowledge of hamming code, and learn how to use the simulation and debugging software QuartusII as well as the hardware description language Verilog, and understand the various features of Hamming codes to master the peinciple of coding and decoding, then to understand and analyze, design its algorithm implementation, and complete the Verilog language programming and simulation on FPGA-based software QuartusII; in the meantime, according to its requirement, select a FPGA chip and external components, finally create the hardware entity, combine the theory with practice. Key words：?HammingDecoder FPGA Verilog language QuartusII 目 录 1 前 言 1 1.1 选题背景 1 1.2 本课题地研究意义 2 1.3 本课题研究目标及主要任务 2 1.4 本课题可行性分析 3 2 EDA地基础知识