基于FPGA的CCD信号处理电路设计.doc

摘 要 在非接触位移测量领域中，电荷耦合器件CCD是具有较高灵敏度的光电传感器，其测量精度高，能自动连续地进行检测。本论文研制了应用于线阵CCD的几种电路。研制了CCD自动增益调整电路。实验证明，这个系统能够自动调整不符合采集要求的CCD增益，提高测量精度。研制了双通道数据采集电路。该电路利用快速A/D转换器AD9048、双端口存贮器IDT7134组成高速采集与缓冲电路，实现了双通道CCD信号的同步高速采集。研制了采用现场可编程门阵列FPGA的CCD驱动与数据处理电路。本文利用Verilog HDL硬件描述语言进行设计，将FPGA器件配置成专用于线阵CCD信号的硬件数据处理器，达到数据实时处理的要求，并同时将CCD驱动电路集成在FPGA器件内，缩小了电路面积，提高了系统的集成度。 关键词：自动增益调整 电荷耦合器 现场可编程门阵列 信号处理 Abstract In field of displacement measure without touch，charge couple device CCD is a high sensitivity photoelectric sensor with high measurement precision，which can be used in automatic succession measure.In this thesis，several kinds of circuit applied on linear CCD are researched and produced. A kind of circuit for the auto-gain regulation of CCD is research and produced. According to the linear relationship between the CCD exposure time and the output analogic voltage，It is proved by the experiment that the gain of CCD which doesn’t accord with the collection circuit can be self-regulated by this system, meanwhile the precision of measure is increased. The circuit for dual-way data collection is researched and produced，in which the high-speed collectin and buffer circuit are formed on basis of using fast A/D converter AD9048 and dual-way memory IDT7134.So the synchro high data collection for dual-way CCD signal is fulfilled. The circuit of CCD drive and data process are researched，in which field programmable gate arrays(FPGA)is adopted.In this thesis，Verilog HDL hardware description language is used in design，FPGA device is configured to hardware data processor used especially on linear CCD signal，the request of data process on real time is satisfied.At the same time，the circuit for CCD drive is integrated in FPGA device，the area of the circuit is decreased，the systematic integrated level is also increased. Keywords: auto-gain regulation 第一章 绪论 1 1.1 CCD基本概述 1 1.2 本课题研究的目的、意义 2 第二章 方案论证与方案设计 3 2.1 国内外研究现状和发展动态 3 2.2 CCD信号处理电路结构及原理 3 2.3 本文所做的主要工作 4 第三章 CCD自动增益调整电路设计 6 3.1 光源光功率的调整 6 3.2 驱动