《利用VHDL语言在FPGA上实现I2C总线控制器的功能》-毕业论文.doc

PAGE II - - 摘 要 随着微电子技术的发展，现场可编程逻辑门阵列FPGA（Field Programmable Gate Array）可以实现数字电路系统设计的功能。尤其现场可编程逻辑门阵列FPGA具有集成度高的优点，受到工程界高度的重视。I2C总线以接口简单，成本底，可扩展性好在数字系统中得到了广泛的应用。硬件描述语言是数字系统高层设计的核心，是实现数字系统设计新方法的关键技术之一。 本课题正是利用VHDL语言在FPGA上实现I2C总线控制器的功能。首先研究了I2C总线的规范，又简要介绍了QuartusⅡ设计环境以及FPGA的设计流程。在此基础上，重点介绍了I2C控制器的总体设计方案，以及在QuartusⅡ平台上的时序仿真。 关键词　Quartus II；I2C总线控制器；现场可编程逻辑门阵列；时序仿真 Abstract With the development of micro electric and EDA(electronic design automation)technology, FPGA(field programmable gates array) can realize the function of digital circuit system design .FPGA have the merit of filed programmability and High integration rate ,therefore is highly recognized for engineering.I2C bus is widely applied in the digital system as simple interface ,expedient use ,low cost and good expansibility .VHDL is considered as a core of digital system design and a key technique of implement digital system. The design realizes the function of I2C bus interface on the FPGA .At first the thesis deeply research I2C bus specification ,then briefly introduce the Quartus II design environment and the design method ,as well as FPGA design flow .In this foundation,I2C bus controller design scheme and the timing simulation under Quartus II is particularly introduced. Key words Quartus II;I2C bus controller ;FPGA ;timing simulation 目 录 TOC \o 1-3 \h \z \u HYPERLINK \l _Toc23016 摘 要 PAGEREF _Toc23016 I HYPERLINK \l _Toc6188 Abstract PAGEREF _Toc6188 II HYPERLINK \l _Toc27827 第1章 绪论 PAGEREF _Toc27827 5 HYPERLINK \l _Toc3030 1.1 课题背景 PAGEREF _Toc3030 5 HYPERLINK \l _Toc14393 1.2 I2C总线的产生及发展 PAGEREF _Toc14393 6 HYPERLINK \l _Toc13793 1.3 FPGA的现状与展望 PAGEREF _Toc13793 6 HYPERLINK \l _Toc5092 1.4 相关工作 PAGEREF _Toc5092 6 HYPERLINK \l _Toc5780 第2章 I2C总线技术的研究 PAGEREF _Toc5780 8 HYPERLINK \l _Toc4936 2.1 I2C总线的概念 PAGEREF _Toc4936 8 HYPERLINK \l _Toc15893 2.2 I2C总线的传输 PAGEREF _Toc15893 9 HYPERLINK \l _Toc3423 2.2.1 数据的有效性 PAGEREF _Toc3423 9 HYPERLINK \l _Toc22811 2.2.2 I2C总线数据传送的开始和