常用芯片数据手册ics2509c.pdf
Integrated
Circuit
ICS250
Systems,.
3.3VPhase-LockLoopClockDriver
GeneralDescriptionFeatures
TheICS2509Cisahighperformance,lowskew,lowjitter•MeetsorexceedsPC133DIMM
clockdriver.Itusesaphaselockloop(PLL)technologytospecification1.1
align,inbothphaseandfrequency,theCLKINsignalwith•SpreadSpectrumClockCompatible
theCLKOUTsignal.Itisspecificallydesignedforusewith
synchronousSDRAMs.TheICS2509Coperatesat3.3V•Distributesoneclockinputtoonebankoffiveandone
VCCanddrivesuptonineclockloads.bankoffouroutputs
•Separateoutputenable(OEA,OEB)foreachoutput
Onebankoffiveoutputsandonebankoffouroutputsbank
provideninelow-skew,low-jittercopiesofCLKIN.Output•Operatingfrequency25MHzto175Mhz
signaldutycyclesareadjustedto50percent,t
ofthedutycycleatCLKIN.Eachbankofoutputscanbe•Externalfeedbackinput(FBIN)terminalisusedto
enabledordisabledseparayviacontrol(OEAandOEB)synchrionizetheoutputstotheclockinput
inputs.WhentheOEinputsarehigh,theoutputsalignin•NoexternalRworkrequired
phaseandfrequencywithCLKIN;whentheOEinputsare•Operatesat3.3VVcc
low,theoutputsaredisabledtothelogiclowstate.
•stic24-pin173milTSSOPpackage
TheICS2509CdoesnotrequireexternalRCfilter
components.TheloopfilterforthePLLisludedon-chip,
minimizingcomponentcount,boardspace,andcost.The
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