一种低静态电流高稳定性的LDO线性稳压器ALow-电子与信息学报.PDF

第28 卷第8 期 电 子 与 信 息 学 报 Vol.28No.8 2006 年8 月 Journal of Electronics Information Technology Aug.2006 一种低静态电流、高稳定性的 LDO 线性稳压器 陈东坡 何乐年 严晓浪 (浙江大学超大规模集成电路研究所 杭州 310027) 摘 要 该文提出了一种低静态电流、高稳定性低压差(LDO)线性稳压器。LDO 中的电流偏置电路产生 30nA的低 温度漂移偏置电流，可使LDO 的静态工作电流降低到4μA 。另外，通过设计一种新型的动态Miller频率补偿结构使 得电路的稳定性与输出电流无关，达到了高稳定性的设计要求。芯片设计基于CSMC公司的0.5μm CMOS混合信号 模型，并通过了流片验证。测试结果表明，该稳压器的线性调整和负载调整的典型值分别为 2mV和 14mV；输出 的最大电流为300mA；其输出压差在150mA输出电流，3.3V输出电压下为170mV；输出噪声在频率从22Hz到80kHz 间为150μVRMS 。 关键词 低压差线性稳压器，静态电流，稳定性，线性和负载调整 中图分类号：TN401，TN86 文献标识码：A 文章编号：1009-5896(2006)08-1526-04 A Low-dropout Regulator with Low Quiescent Current and High Stability Chen Dong-po He Le-nian Yan Xiao-lang (The Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China) Abstract An unconditionally stable low-dropout regulator and low quiescent current is presented. The Low DropOut ( LDO) based on a high precision CMOS current reference, which is comprised of subthreshold transistors and has small temperature coefficient, provides a low quiescent current of approximately 4μA. Furthermore, by utilizing the design method of active Miller frequency compensation, the proposed LDO’s stability is independent of the load or the Equivalent Series Resistance (ESR) of the off-chip capacitor. The chip design is based on 0.5μm CMOS mixed-signal process of CSMC. The simulation and experimental results show that the line and load regulations are only 2mV and 14mV, respectively. The dropout voltage is only 1