QuartusII设计正弦信号发生器.PDF
文本预览下载声明
Quartus II VHDLVerilog VHDLVerilog QuartusII
MATLAB DSP Builder FPGA DSP DSP EDA SOPC
Builder SOPC QuartusII
4 256M
3.1 VHDL
3.1.1
QuartusII
DSP Builder3 3-1
ROMD/A3 ROM
3-1SINGT.VHDFPGA
2 ROM5 ROMROMLPM_ROM
LPM_ROMFPGAEABESBCLKf0
64 D/Af
显示全部