OTISGen2电梯故障代码.pdf

TCD Table for Control Panel DetectionTCD Definition Description Hold GradeOPER. SPD. 1 2 3 4 OperationERR_SW_WDT CPU S/W WDT trouble5 ● R1occurred 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26~ 29 30 31 32 33 34 35 36 ERR_MEM_ALLOC ERR_TASK_CREATE ERR_SEM_CREATE ERR_WDT_CREATE ERR_INT Memory allocation failed Task making failed Semaphore making failed Operation CPU WDT Timer making failed Non definitional vector Interrupt occurred ● ● ● ● ● R1 R1 R1 R1 XX ERR_INV ERR_INV_RETRY Speed CPU H/W WDT trouble occurred Speed CPU Retry failure ● ● R1 R1● ● ERR_INV_DPRAM Speed CPU DPRAM WRITE trouble ● R1 ERR_INV_OC ERR_DC_OV ERR_INV_U_SHORT ERR_INV_V_SHORT ERR_INV_W_SHORT ERR_INV_TR INV over current (H/W detection) DC Link over voltage ● ● ● ● ● ● ● ● ● ● ● ● ● ● R1 R1 R1 R1 R1 R1 R1 INV phase U IGBT trouble INV phase V IGBT trouble INV phase W IGBT trouble Regenerative IGBT trouble INV Hall CT troubleERR_INV_H_CT ERR_INV_U_STACK_TH ERMAL ER_LOTOR_ROCK_ERR 37 INV stack over heat LRT operation error ● ● R4 R138 39 ● PDF文件使用 pdf Fact or y试用版本创建 www. f i nepr i nt . cn 声明：本资料来源于网络，请勿用于商业用途，若涉版权问题请与24小时内删除。 海量免费技术资料请加QQ群：414157718 （提供大量免费技术资料与技术交流，共同提高技术水平，广告勿扰！！！） DetectionTCD Definition Description Hold Grade R1 OPER. SPD. 40 41 42 43 44 45 46 47 48 49 50 51 ERR_INV_C_CNTL INV current control trouble ● ERR_INV_DC_LINK_UV DC link under voltage ● ● R2 R1ERR_INV_REVERSE_RU52 INV reverse rotation detectionN 53 54 55 56 57 58 59 60 ERR_INV_CHARGE INV charging trouble ● ● ● ● C R1 R1 R2 R3 ERR_INV_OVER_LOAD ERR_INV_LOW_SPEED ERR_INV_HIGH_SPEED INV over load detection INV under speed detection INV over speed detection ERR_INV_ANTISTALL ERR_INV_SPEC ERR_INV_SPEC_COM ERR_INV_V48 INV. No operable for 24 sec. INV Spec Data trouble INV Spec write trouble ● ● ● ● R2 R1 R1 R1 ● 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 INV momentary power failure detection ERR_V100 ERR_POWER ERR_V48 ER_C1SW_ON ER_C1SW_Off ERR_SPEC_OVER Missed phase detection (100V) 48V power tr